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Espressif Systems /ESP32-S2 /I2S0 /LC_HUNG_CONF

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Interpret as LC_HUNG_CONF

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0LC_FIFO_TIMEOUT0LC_FIFO_TIMEOUT_SHIFT 0 (LC_FIFO_TIMEOUT_ENA)LC_FIFO_TIMEOUT_ENA

Description

I2S Hung configuration register

Fields

LC_FIFO_TIMEOUT

I2S_TX_HUNG_INT interrupt or I2S_RX_HUNG_INT interrupt will be triggered when FIFO hung counter is equal to this value.
LC_FIFO_TIMEOUT_SHIFT

The bits are used to set the tick counter threshold. The tick counter is clocked by APB_CLK. The tick counter threshold is 88000/2^I2S_LC_FIFO_TIMEOUT_SHIFT. The tick counter is reset when it reaches the threshold.
LC_FIFO_TIMEOUT_ENA

The enable bit for FIFO timeout.

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Register License

Copyright 2024 Espressif Systems (Shanghai) PTE LTD

Licensed under the Apache License, Version 2.0 (the “License”); you may not use this file except in compliance with the License. You may obtain a copy of the License at

http://www.apache.org/licenses/LICENSE-2.0

Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data